Since a group III nitride semiconductor light-emitting device has a direct transition-type energy band gap which corresponds in a range from the visible wavelength to the ultraviolet wavelength, and has excellent light-emitting efficiency, it has been used as a light-emitting device, such as LEDs or LDs.
In addition, an electronic device having a group III nitride semiconductor has superior properties to those of conventional electronic devices having a group III-V compound semiconductor.
Such a group III-V compound semiconductor is generally produced by growing a group III-V compound semiconductor crystal on a single crystal wafer containing a different compound from the semiconductor crystal. There is a large lattice mismatch between the single crystal wafer containing a different compound from the semiconductor crystal and the group III-V compound semiconductor crystal obtained by epitaxial growth. For example, when gallium nitride (GaN) is grown on a sapphire (Al2O3) substrate, there is a 16% of lattice mismatch between them. When gallium nitride is grown on a SiC substrate, there is a 6% lattice mismatch between them.
In general, when there is a large lattice mismatch, it is difficult to epitaxially grow crystal on a substrate directly. Even when crystal is epitaxially grown on the substrate, the density of the crystal is decreased, together with a decrease of crystallinity.
Then, a layer, which is called a buffer layer, is generally formed between the substrate and the group III-V compound semiconductor crystal to minimize the lattice mismatch between them. For example, Patent documents Nos. 1 and 2 suggest a method in which when group III nitride semiconductor crystal is epitaxially grown on a sapphire single crystal substrate or a SiC single crystal substrate by a metalorganic chemical vapor deposition (MOCVD) method, a low temperature buffer layer containing aluminum nitride (AlN) or gallium aluminum nitride (AlGaN) is epitaxially grown on the substrate at 400 to 600° C. in advance, and then group III nitride semiconductor crystal is epitaxially grown on the low temperature buffer layer at high temperatures, for example, about 1000° C.
In addition, a technique for forming the buffer layer by a method other than MOCVD is also suggested. Specifically, a method is suggested in which a buffer layer is formed by sputtering using high frequency, and a crystal layer having the same composition as that of the buffer layer is formed by MOCVD method (Patent Document No. 3). However, the density and crystallinity of the crystal formed on the buffer layer are decreased. It is impossible to stably laminate an excellent crystal layer.
Then, Patent Document No. 4 discloses a method in which after growing a buffer layer, the buffer layer is annealed in a mixed gas containing ammonia and hydrogen to constantly obtain an excellent crystal layer.
In addition, Patent Document No. 5 discloses a method in which a buffer layer having a thickness of 50 to 3,000 angstroms is produced by a DC sputtering method at 400° C. or more, and the obtained buffer layer is annealed in a mixed gas containing ammonia and hydrogen.
Patent Documents Nos. 4 and 5 disclose sapphire, silicon, carbonized silicon, zinc oxide, gallium phosphide, gallium arsenide, magnesium oxide, manganese oxide, a group III nitride semiconductor single crystal, etc. as a material used for a substrate. They also disclose that an a-plane of a sapphire substrate is the most suitable as the substrate.
However, when the buffer layer is annealed under severe conditions with a very high reducing ability, such as in the mixed gas containing ammonia and hydrogen, damage of the buffer layer is increased. As a result, the density of the crystal layer on the buffer layer is not sufficiently improved. In addition, damage of not only the buffer layer but also the substrate is also serious.
Research for producing group III nitride semiconductor crystal by sputtering method has also been also carried out. For example, Patent Document No. 6 discloses that a GaN film is directly formed on a sapphire substrate by the sputtering method in order to laminate a GaN film having high resistance. The lamination conditions are such that the ultimate vacuum is 5×10−7 Torr to 5×10−8 Torr, the flowing gas in a chamber is Ar and N2, the gas pressure for sputtering is 3×10−2 Torr to 5×10−2 Torr, the RF voltage is 0.7 kV to 0.9 kV (corresponding to 20 to 40 W in power), the distance between a substrate and a target is 20 mm to 50 mm, and the substrate temperature is 150° C. to 450° C.
However, the compound semiconductor disclosed in Patent Document No. 6 is used for MIS elements, and not used for LEDs having a buffer layer, an n-type group III nitride semiconductor crystal layer, a light-emitting layer, and a p-type group III nitride semiconductor crystal layer which are laminated on a sapphire substrate in this order.
In addition, the following Non-Patent Document No. 1 reports that a GaN film is laminated on the (100) plane of Si and the (0001) plane of Al2O3 (0001) by high frequency magnetron sputtering using N2 gas. The lamination conditions are that the total gas pressure is 2 mTorr, the supplied power is 100 W, and the substrate temperature is changed from room temperature to 900° C. According to the figure of Non-Patent Document No. 1, a target and a substrate face each other in the used device.
In the following Non-Patent Document No. 2, a GaN film is formed using a device in which a cathode and a target face each other and a mesh is placed between the substrate and the target. According to Non-Patent Document No. 2, the lamination conditions are such that the pressure is 0.67 Pa, the atmosphere is N2 gas, the substrate temperature is 84° C. to 600° C., the supplied power is 150 W, and the distance between the substrate and the target is 80 mm. However, there is no description about any pretreatments for the buffer layer in Non-Patent Documents Nos. 1 and 2.
The following Patent Document No. 7 discloses a method in which reverse sputtering is carried out using Ar gas as a pretreatment for a semiconductor layer when an electrode is formed on the semiconductor layer.
However, according to Patent Document No. 7, only electrical interengagement properties between the semiconductor layer and the electrode are improved by reverse sputtering the surface of the group III nitride semiconductor layer, and then forming a metal layer by deposition. There is no description about any relationship between a pretreatment for the buffer layer and density of the group III nitride semiconductor layer laminated on the buffer layer in Patent Document No. 7.    [Patent Document No. 1] Japanese Patent (Granted) Publication No. 3026087    [Patent Document No. 2] Japanese Unexamined Patent Application, First Publication No. H4-297023    [Patent Document No. 3] Japanese Examined Patent Application, Second Publication No. H5-86646    [Patent Document No. 4] Japanese Patent (Granted) Publication No. 3440873    [Patent Document No. 5] Japanese Patent (Granted) Publication No. 3700492    [Patent Document No. 6] Japanese Unexamined Patent Application, First Publication No. S60-39819    [Patent Document No. 7] Japanese Unexamined Patent Application, First Publication No. H8-264478    [Non-Patent Document No. 1] The 21st century union symposium collected papers, Vol. 2nd, page 295 (2003)    [Non-Patent Document No. 2] Vacuum, Vol. 66, page 233 (2002)